Intel 8086 is a 16-bit integer processor. It has a 16-bit data bus and a 20-bit address bus. Since 20-bit address lines are available, they provide up to 1 MB of storage. It consists of a powerful set of instructions that makes it easy to perform different operations. It supports 2 operating modes, Maximum (multiple processors can be used) and Minimum (only one processor is used). 8086 Architecture The internal architecture of the 8086 is divided into 2 units, the Bus Interface Unit (BIU) and the Execution Unit (EU). A diagram of the architecture is shown below. Say no to plagiarism. Get a tailor-made essay on “Why violent video games should not be banned”?Get the original essayBus Interface Unit (BIU) BIU takes care of all data and address transfers on buses for the EU , like sending addresses, fetching instructions from memory, reading data from ports, writing data to memory ports and finally, it also generates the memory addresses. The UE and BIU are connected by the internal bus. BIU consists of the following functional parts: Instruction Queue – BIU uses the concept of pipeline. This means that while the current instruction is executing, the BIU fetches up to 6 bytes from the next instruction (prefetch) and stores them in the instruction queue. Once execution is complete, the instruction queue is ready to provide the next set of instructions which is simply read and executed. This results in increased execution speed. Instruction Pointer – This is a 16-bit register used to hold the address of the next instruction to be executed. Segment Register – BIU has 4 segment buses i.e. CS, DS, SS and ES. It contains the addresses of instructions and data in memory, which are used by the processor to access memory locations.CS - It stands for Segment Code. It is used to address a memory location in the code segment of memory, where the executable program is stored.DS - It stands for Data Segment. It consists of data used by the program and is accessed in the data segment by an offset address or the contents of another register containing the offset address.SS - It stands for Stack Segment. It manages memory to store data and addresses during execution.ES - It stands for Extra Segment. ES is an additional data segment, which is used by the chain to hold the additional destination data. EU gives instructions to BIU on where to retrieve the data, decode it and finally execute it. Its function is to control data operations using the instruction decoder and the ALU (Arithmetic Logic Unit). The data on which operations are performed is entered using the BIU. The UE includes the following functional parts: ALU - It handles all arithmetic and logic operations, like +, −, ×, /, OR, AND & NOT.Flag Register - It is a 16-bit register that behaves like a seesaw. , that is to say that it changes state depending on the result stored in the accumulator. It has 9 indicators and they are divided into 2 groups – Conditional Indicators and Control Indicators. It represents the result of the last arithmetic or logic instruction executed. These flags are listed below: A. Carry Flag - This flag is set to "1" when an addition causes a carry or a subtraction causes a borrow.B. Auxiliary Flag - This flag is set to "1" when an addition causes a carry when moving from a lower nibble to a higher nibble in the BCD addition.C..